Background

Are you up for the challenge to develop next generation integrated circuits for our continued leadership in mobile communications? In radio base stations, high-speed analog-to-digital converters (ADCs) are required to handle wide band signals. Different kind of imperfections and mismatch errors can severely degrade the performance of ADCs. For instance, the bit-weights of an ADC can differ from the intended and result in distortion of the sampled signal.  In this thesis work a few different techniques to mitigate bit-weight errors in SAR ADCs will be evaluated by modeling and analysis using MATLAB.

Thesis Description

The following steps are envisioned as part of the thesis work:

  • Literature survey to gain familiarity with bit-weight errors in ADCs and mitigation techniques.
  • Model implementation of a few selected mitigation techniques from the literature studies. Other ideas for mitigation may also be tried out.
  • Evaluate and compare the different techniques by use of MATLAB model.

The thesis will be concluded with a result presentation for the Ericsson team.

Qualifications

  • This project aims at students in electrical engineering, computer engineering or similar with interest in integrated circuit design and MATLAB modeling.
  • Analog/digital circuit design basics (relevant coursework).
  • Experience in MATLAB.
Extent

1 student, 30hp

Preferred Starting Date

Spring 2024

Location

Ericsson AB Mjärdevi, Linköping

Keywords

Full custom, ASIC, CMOS, Data Converters,
DAC, ADC

 

Contact Persons

Recruiting Manager

Niklas Andersson

+46 722 20 43 78

niklas.b.andersson@ericsson.com